View TPS54332DDAR_3881176.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 3.5a, 28v, 1mhz, step down swift ? dc/dc converter with eco-mode ? check for samples: tps54332 1 features applications ? consumer applications such as set-top 2 ? 3.5v to 28v input voltage range boxes, cpe equipment, lcd displays, ? adjustable output voltage down to 0.8v peripherals, and battery chargers ? integrated 80 m ? high side mosfet supports ? industrial and car audio power supplies up to 3.5a continuous output current ? 5v, 12v and 24v distributed power systems ? high efficiency at light loads with a pulse skipping eco-mode ? description ? fixed 1mhz switching frequency the tps54332 is a 28 v, 3.5 a non-synchronous ? typical 1 m a shutdown quiescent current buck converter that integrates a low r ds(on) high side ? adjustable slow start limits inrush currents mosfet. to increase efficiency at light loads, a pulse skipping eco-mode ? feature is automatically ? programmable uvlo threshold activated. furthermore, the 1 m a shutdown supply ? overvoltage transient protection current allows the device to be used in battery ? cycle by cycle current limit, frequency fold powered applications. current mode control with back and thermal shutdown protection internal slope compensation simplifies the external compensation calculations and reduces component ? available in thermally enhanced 8-pin soic count while allowing the use of ceramic output powerpad ? package capacitors. a resistor divider programs the hysteresis ? supported by switcherpro ? software tool of the input under-voltage lockout. an overvoltage ( http://focus.ti.com/docs/toolsw/folders/print/s transient protection circuit limits voltage overshoots witcherpro.html ) during startup and transient conditions. a cycle by cycle current limit scheme, frequency fold back and ? for swift ? documentation, see the ti thermal shutdown protect the device and the load in website at www.ti.com/swift the event of an overload condition. the tps54332 is available in an 8-pin soic powerpad ? package. simplified schematic efficiency 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 swift, eco-mode, powerpad, switcherpro are trademarks of texas instruments. production data information is current as of publication date. copyright ? 2009 ? 2010, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. ph vin gnd boot vsense comp ss c ss d1 vin vout en tps54332 c i c boot l o c o ren1 r o2 c 1 c 2 r 3 ren2 r o1 60 65 70 75 80 85 90 95 100 0 0.5 1 1.5 2 2.5 3 3.5 i - output current - a o efficiency - % v = 2.5 v o v = 5 v i v = 12 v i v = 15 v i
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. description continued for additional design needs, see: tps54231 tps54232 tps54233 tps54331 tps54332 i o (max) 2a 2a 2a 3a 3.5a input voltage range 3.5v - 28v 3.5v - 28v 3.5v - 28v 3.5v - 28v 3.5v - 28v switching freq. (typ) 570khz 1000khz 285khz 570khz 1000khz switch current limit (min) 2.3a 2.3a 2.3a 3.5a 4.2a pin/package 8soic 8soic 8soic 8soic 8so powerpad ? ordering information (1) t j package switching frequency part number (2) ? 40 c to 150 c 8 pin soic powerpad tm 1 mhz tps54332dda (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti web site at www.ti.com. (2) the dda package is also available taped and reeled. add an r suffix to the device type (i.e., TPS54332DDAR). see applications section of data sheet for layout information. absolute maximum ratings (1) over operating free-air temperature range (unless otherwise noted) value unit vin ? 0.3 to 30 en ? 0.3 to 6 boot 38 input voltage v vsense ? 0.3 to 3 comp ? 0.3 to 3 ss ? 0.3 to 3 boot-ph 8 output voltage ph ? 0.6 to 30 v ph (10 ns transient from ground to negative peak) ? 5 en 100 m a boot 100 ma source current vsense 10 m a ph 9.25 a vin 9.25 a sink current comp 100 m a ss 200 electrostatic human body model (hbm) 2 kv discharge charged device model (cdm) 500 v operating junction temperature ? 40 to 150 c storage temperature ? 65 to 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 package dissipation ratings (1) (2) (3) thermal impedance pseudo thermal impedance package junction to ambient junction to top dda 50 c/w 5 c/w (1) maximum power dissipation may be limited by overcurrent protection (2) power rating at a specific ambient temperature t a should be determined with a junction temperature of 150 c. this is the point where distortion starts to substantially increase. thermal management of the pcb should strive to keep the junction temperature at or below 150 c for best performance and long-term reliability. see power dissipation estimate in application section of this data sheet for more information. (3) test board conditions: ( a) 2 inches x 1.5 inches, 2 layers, thickness: 0.062 inch ( b) 2-ounce copper traces located on the top and bottom of the pcb ( c) 6 thermal vias in the powerpad area under the device package recommended operating conditions over operating free-air temperature range (unless otherwise noted) min typ max unit operating input voltage on (vin pin) 3.5 28 v operating junction temperature, t j ? 40 150 c electrical characteristics t j = ? 40 c to 150 c, vin = 3.5v to 28v (unless otherwise noted) description test conditions min typ max unit supply voltage (vin pin) internal undervoltage lockout threshold rising and falling 3.5 v shutdown supply current en = 0v, vin = 12v, ? 40 c to 85 c 1 4 m a operating ? non switching supply current vsense = 0.85 v 82 120 m a enable and uvlo (en pin) enable threshold rising and falling 1.25 1.35 v input current enable threshold ? 50 mv -1 m a input current enable threshold + 50 mv -4 m a voltage reference voltage reference 0.772 0.8 0.828 v high-side mosfet boot-ph = 3 v, vin = 3.5 v 115 200 on resistance m ? boot-ph = 6 v, vin = 12 v 80 150 error amplifier error amplifier transconductance (gm) ? 2 m a < i comp < 2 m a, v(comp) = 1 v 92 m mhos error amplifier dc gain (1) vsense = 0.8 v 800 v/v error amplifier unity gain bandwidth (1) 5 pf capacitance from comp to gnd pins 2.7 mhz error amplifier source/sink current v (comp) = 1.0 v, 100 mv overdrive 7 m a switch current to comp transconductance vin = 12 v 12 a/v switching frequency tps54332 switching frequency vin = 12v, 25 c 800 1000 1200 khz minimum controllable on time vin = 12v, 25 c 110 135 ns maximum controllable duty ratio (1) boot-ph = 6 v 90 93 % pulse skipping eco-mode ? pulse skipping eco-mode ? switch current threshold 160 ma current limit current limit threshold vin = 12 v 4.2 6.5 a (1) specified by design copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 3 product folder link(s): tps54332
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com electrical characteristics (continued) t j = ? 40 c to 150 c, vin = 3.5v to 28v (unless otherwise noted) description test conditions min typ max unit thermal shutdown thermal shutdown 165 c slow start (ss pin) charge current v (ss) = 0.4 v 2 m a ss to vsense matching v (ss) = 0.4 v 10 mv device information pin assignments terminal functions terminal description name no. boot 1 a 0.1 m f bootstrap capacitor is required between boot and ph. if the voltage on this capacitor falls below the minimum requirement, the high-side mosfet is forced to switch off until the capacitor is refreshed. vin 2 input supply voltage, 3.5 v to 28 v. en 3 enable pin. pull below 1.25v to disable. float to enable. programming the input undervoltage lockout with two resistors is recommended. ss 4 slow start pin. an external capacitor connected to this pin sets the output rise time. vsense 5 inverting node of the gm error amplifier. comp 6 error amplifier output, and input to the pwm comparator. connect frequency compensation components to this pin. gnd 7 ground. ph 8 the source of the internal high-side power mosfet. powerpad 9 gnd pin must be connected to the exposed pad for proper operation. 4 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 12 3 4 5 6 7 8 boot vin en ss phgnd comp vsense powerpad (pin 9) dda package (top view)
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 functional block diagram typical characteristics characterization curves on resistance shutdown quiescent current switching frequency vs vs vs junction temperature input voltage junction temperature figure 1. figure 2. figure 3. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 5 product folder link(s): tps54332 error amplifier r qs boot charge boot uvlo current sense oscillator frequency shift gate drivelogic slope compensation pwmlatch pwm comparator eco-mode minimum clamp ? maximum clamp voltage reference discharge logic vsense comp ph boot vin gnd thermal shutdown en enable comparator shutdown logic shutdown enable threshold s 1.25 v 0.8 v 80 m w 165 c 2.1v 12 a/v ss shutdown vsense 1 a m 3 a m gm = 92 a/v dc gain = 800 v/v bw = 2.7 mhz m 2 k w 2 a m t - junction temperature - c j rdson - on resistance - m w 60 70 80 90 100 110 120 -50 -25 0 25 50 75 100 125 150 vin = 12 v 980 990 1000 1010 1020 -50 -25 0 25 50 75 100 125 150 t - junction temperature - c j fsw - oscillator frequency - khz vin = 12 v 0 2 4 6 8 3 8 13 18 23 28 v - input voltage - v i isd - shutdown current - a m t = 150c j t = -40c j t = 25c j en = 0 v
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com typical characteristics (continued) voltage reference minimum controllable on time minimum controllable duty ratio vs vs vs junction temperature junction temperature junction temperature figure 4. figure 5. figure 6. ss charge current current limit threshold vs vs junction temperature input voltage figure 7. figure 8. supplemental application curves typical minimum output voltage typical maximum output voltage vs vs input voltage input voltage figure 9. figure 10. 6 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 90 100 110 120 130 140 -50 -25 0 25 50 75 100 125 150 tonmin - minimum controllable on time - ns t - junction temperature - c j vin = 12 v 1.9 1.95 2 2.05 2.1 -50 -25 0 25 50 75 100 125 150 i - ss charge current - a ss m t - junction temperature - c j vin = 12 v 0.776 0.782 0.788 0.794 0.8 0.806 0.812 0.818 0.824 -50 -25 0 25 50 75 100 125 150 vref - voltage reference - v t - junction temperature - c j vin = 12 v 3 3.5 4 4.5 5 5.5 6 6.5 7 3 8 13 18 23 28 v - input voltage - v i current limit threshold - a t = 150c j t = -40c j t = 25c j 3 8 13 18 23 28 0 5 10 15 20 25 30 i = 3.5 a o v - input voltage - v i v - output voltage - v o 9 9.5 10 10.5 11 11.5 12 12.5 13 13.5 14 -50 -25 0 25 50 75 100 125 150 dmin - minimum controllable duty ratio - % t - junction temperature - c j vin = 12 v 3 8 13 18 23 28 0.75 1.25 1.75 2.25 2.75 3.25 3.75 i = 3.5 a o v - output voltage - v o v - input voltage - v i
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 typical characteristics (continued) overview the tps54332 is a 28 v, 3.5 a, step-down (buck) converter with an integrated high-side n-channel mosfet. to improve performance during line and load transients, the device implements a constant frequency, current mode control which reduces output capacitance and simplifies external frequency compensation design. the tps54332 has a pre-set switching frequency of 1mhz. the tps54332 needs a minimum input voltage of 3.5v to operate normally. the en pin has an internal pull-up current source that can be used to adjust the input voltage under-voltage lockout (uvlo) with two external resistors. in addition, the pull-up current provides a default condition when the en pin is floating for the device to operate. the operating current is 82 m a typically when not switching and under no load. when the device is disabled, the supply current is 1 m a typically. the integrated 80 m ? high-side mosfet allows for high efficiency power supply designs with continuous output currents up to 3.5 a. the tps54332 reduces the external component count by integrating the boot recharge diode. the bias voltage for the integrated high-side mosfet is supplied by an external capacitor on the boot to ph pin. the boot capacitor voltage is monitored by an uvlo circuit and will turn the high-side mosfet off when the voltage falls below a preset threshold of 2.1 v typically. the output voltage can be stepped down to as low as the reference voltage. by adding an external capacitor, the slow start time of the tps54332 can be adjustable which enables flexible output filter selection. to improve the efficiency at light load conditions, the tps54332 enters a special pulse skipping eco-mode tm when the peak inductor current drops below 160ma typically. the frequency foldback reduces the switching frequency during startup and over current conditions to help control the inductor current. the thermal shut down gives the additional protection under fault conditions. detailed description fixed frequency pwm control the tps54332 uses a fixed frequency, peak current mode control. the internal switching frequency of the tps54332 is fixed at 1 mhz. eco-mode tm the tps54332 is designed to operate in pulse skipping eco-mode tm at light load currents to boost light load efficiency. when the peak inductor current is lower than 160 ma typically, the comp pin voltage falls to 0.5v typically and the device enters eco-mode tm . when the device is in eco-mode tm , the comp pin voltage is clamped at 0.5v internally which prevents the high side integrated mosfet from switching. the peak inductor current must rise above 160ma for the comp pin voltage to rise above 0.5v and exit eco-mode tm . since the integrated current comparator catches the peak inductor current only, the average load current entering eco-mode tm varies with the applications and external output filters. voltage reference (v ref ) the voltage reference system produces a 2% initial accuracy voltage reference ( 3.5% over temperature) by scaling the output of a temperature stable bandgap circuit. the typical voltage reference is designed at 0.8v. bootstrap voltage (boot) the tps54332 has an integrated boot regulator and requires a 0.1 m f ceramic capacitor between the boot and ph pin to provide the gate drive voltage for the high-side mosfet. a ceramic capacitor with an x7r or x5r grade dielectric is recommended because of the stable characteristics over temperature and voltage. to improve drop out, the tps54332 is designed to operate at 100% duty cycle as long as the boot to ph pin voltage is greater than 2.1v typically. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 7 product folder link(s): tps54332
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com enable and adjustable input under-voltage lockout (vin uvlo) the en pin has an internal pull-up current source that provides the default condition of the tps54332 operating when the en pin floats. the tps54332 is disabled when the vin pin voltage falls below internal vin uvlo threshold. it is recommended to use an external vin uvlo to add hysteresis unless vin is greater than (v out + 2 v). to adjust the vin uvlo with hysteresis, use the external circuitry connected to the en pin as shown in figure 11 . once the en pin voltage exceeds 1.25 v, an additional 3 m a of hysteresis is added. use equation 1 and equation 2 to calculate the resistor values needed for the desired vin uvlo threshold voltages. the v start is the input start threshold voltage, the v stop is the input stop threshold voltage and the v en is the enable threshold voltage of 1.25 v. the v stop should always be greater than 3.5 v. figure 11. adjustable input undervoltage lockout (1) (2) programmable slow start using ss pin it is highly recommended to program the slow start time externally because no slow start time is implemented internally. the tps54332 effectively uses the lower voltage of the internal voltage reference or the ss pin voltage as the power supply ? s reference voltage fed into the error amplifier and will regulate the output accordingly. a capacitor (c ss ) on the ss pin to ground implements a slow start time. the tps54332 has an internal pull-up current source of 2 m a that charges the external slow start capacitor. the equation for the slow start time (10% to 90%) is shown in equation 3 . the v ref is 0.8v and the i ss current is 2 m a. (3) the slow start time should be set between 1ms to 10ms to ensure good start-up behavior. the slow start capacitor should be no more than 27nf. if during normal operation, the input voltage drops below the vin uvlo threshold, or the en pin is pulled below 1.25v, or a thermal shutdown event occurs, the tps54332 stops switching. error amplifier the tps54332 has a transconductance amplifier for the error amplifier. the error amplifier compares the vsense voltage to the internal effective voltage reference presented at the input of the error amplifier. the transconductance of the error amplifier is 92 m a/v during normal operation. frequency compensation components are connected between the comp pin and ground. slope compensation in order to prevent the sub-harmonic oscillations when operating the device at duty cycles greater than 50%, the tps54332 adds a built-in slope compensation which is a compensating ramp to the switch current signal. 8 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 en start en v ren2 = v - v + 1 a ren1 m start stop v - v ren1 = 3 a m en 1.25 v vin + - ren1ren2 tps54332 1 a m 3 a m ( ) ( ) ( ) ( ) ss ref ss ss c nf v v t ms = i a m
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 current mode compensation design to simplify design efforts using the tps54332, the typical designs for common applications are listed in table 1 . for designs using ceramic output capacitors, proper derating of ceramic output capacitance is recommended when doing the stability analysis. this is because the actual ceramic capacitance drops considerably from the nominal value when the applied voltage increases. advanced users may refer to the step by step design procedure in the application information section for the detailed guidelines or use switcherpro ? software tool ( http://focus.ti.com/docs/toolsw/folders/print/switcherpro.html ). table 1. typical designs (referring to simplified schematic on page 1) vin v out f sw l o c o r o1 r o2 c 2 c 1 r 3 (v) (v) (khz) ( m h) (k ? ) (k ? ) (pf) (pf) (k ? ) 12 5 1000 3.3 ceramic 22 m f 10 1.91 18 470 24.9 12 3.3 1000 2.7 ceramic 22 m f x 2 10 3.24 18 1800 39.2 12 5 1000 3.3 aluminum 330 m f/160mohm 10 1.91 22 47 10 12 3.3 1000 2.7 aluminum 330 m f/160mohm 10 3.24 39 100 29.4 overcurrent protection and frequency shift the tps54332 implements current mode control that uses the comp pin voltage to turn off the high-side mosfet on a cycle by cycle basis. every cycle the switch current and the comp pin voltage are compared; when the peak inductor current intersects the comp pin voltage, the high-side switch is turned off. during overcurrent conditions that pull the output voltage low, the error amplifier responds by driving the comp pin high, causing the switch current to increase. the comp pin has a maximum clamp internally, which limit the output current. the tps54332 provides robust protection during short circuits. there is potential for overcurrent runaway in the output inductor during a short circuit at the output. the tps54332 solves this issue by increasing the off time during short circuit conditions by lowering the switching frequency. the switching frequency is divided by 8, 4, 2, and 1 as the voltage ramps from 0 v to 0.8 v on vsense pin. the relationship between the switching frequency and the vsense pin voltage is shown in table 2 . table 2. switching frequency conditions switching frequency vsense pin voltage 1 mhz vsense 0.6 v 1 mhz / 2 0.6 v > vsense 0.4 v 1 mhz / 4 0.4 v > vsense 0.2 v 1 mhz / 8 0.2 v > vsense overvoltage transient protection the tps54332 incorporates an overvoltage transient protection (ovtp) circuit to minimize output voltage overshoot when recovering from output fault conditions or strong unload transients. the ovtp circuit includes an overvoltage comparator to compare the vsense pin voltage and internal thresholds. when the vsense pin voltage goes above 109% v ref , the high-side mosfet will be forced off. when the vsense pin voltage falls below 107% v ref , the high-side mosfet will be enabled again. thermal shutdown the device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 165 c. the thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal trip threshold. once the die temperature decreases below 165 c, the device reinitiates the power up sequence. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 9 product folder link(s): tps54332
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com application information figure 12. typical application schematic step by step design procedure the following design procedure can be used to select component values for the tps54332. alternately, the switcherpro ? software may be used to generate a complete design. the switcherpro ? software uses an iterative design procedure and accesses a comprehensive database of components when generating a design. this section presents a simplified discussion of the design process. to begin the design process a few parameters must be decided upon. the designer needs to know the following: ? input voltage range ? output voltage ? input ripple voltage ? output ripple voltage ? output current rating ? operating frequency for this design example, use the following as the input parameters table 3. design parameters design parameter example value input voltage range 5 v to 15 v output voltage 2.5 v input ripple voltage 200 mv output ripple voltage 20 mv output current rating 3.5 a operating frequency 1 mhz switching frequency the switching frequency for the tps54332 is fixed at 1 mhz. 10 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 output voltage set point the output voltage of the tps54332 is externally adjustable using a resistor divider network. in the application circuit of figure 12 , this divider network is comprised of r5 and r6. the relationship of the output voltage to the resistor divider is given by equation 4 and equation 5 : (4) (5) choose r5 to be approximately 10 k ? . slightly increasing or decreasing r5 can result in closer output voltage matching when using standard value resistors. in this design, r4 = 10.2 k ? and r = 4.75 k ? , resulting in a 2.5 v output voltage. input capacitors the tps54332 requires an input decoupling capacitor and depending on the application, a bulk input capacitor. the typical recommended value for the decoupling capacitor is 10 m f. a high-quality ceramic type x5r or x7r is recommended. the voltage rating should be greater than the maximum input voltage. a smaller value may be used as long as all other requirements are met; however 10 m f has been shown to work well in a wide variety of circuits. additionally, some bulk capacitance may be needed, especially if the tps54332 circuit is not located within about 2 inches from the input voltage source. the value for this capacitor is not critical but should be rated to handle the maximum input voltage including ripple voltage, and should filter the output so that input ripple voltage is acceptable. for this design a single 10 m f capacitor is used for the input decoupling capacitor. it is x5r dielectric rated for 25 v. the equivalent series resistance (esr) is approximately 3 m ? , and the current rating is 3 a. this input ripple voltage can be approximated by equation 6 (6) where i out(max) is the maximum load current, f sw is the switching frequency (derated by a factor of 0.8), c bulk is the bulk capacitor value and esr max is the maximum series resistance of the bulk capacitor. the maximum rms ripple current also needs to be checked. for worst case conditions, this can be approximated by equation 7 (7) in this case, the input ripple voltage would be 98 mv and the rms ripple current would be 1.75 a. it is also important to note that the actual input voltage ripple will be greatly affected by parasitic associated with the layout and the output impedance of the voltage source. the actual input voltage ripple for this circuit is shown in design parameters and is larger than the calculated value. this measured value is still below the specified input limit of 200 mv. the maximum voltage across the input capacitors would be vin max plus vin/2. the chosen bypass capacitor is rated for 25 v and the ripple current capacity is greater than 3 a, providing ample margin. it is important that the maximum ratings for voltage and current are not exceeded under any circumstance. output filter components two components need to be selected for the output filter, the output inductor l1 and the output capacitance. since the tps54332 is an externally compensated device, a wide range of filter component types and values can be supported. inductor selection to calculate the minimum value of the output inductor, use equation 8 (8) copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 11 product folder link(s): tps54332 out ref r5 v = v +1 r6 ? ? 2 out(max) cin i i = ( ) 0.8 - out(max) in(max) out min in(max) ind out sw v v v l = v k i f ( ) out(max) in out(max) max bulk sw i 0.25 v = + i esr c f d ref out ref r5 v r6 = v v -
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com k ind is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. in general, this value is at the discretion of the designer; however, the following guidelines may be used. for designs using low esr output capacitors such as ceramics, a value as high as k ind = 0.4 may be used. when using higher esr output capacitors, k ind = 0.2 yields better results. for this design example, use k ind = 0.3 and the minimum inductor value is calculated to be 2.48 m h. for this design, a l 2.5 m h inductor is chosen. for the output filter inductor, it is important that the rms current and saturation current ratings not be exceeded. the rms inductor current can be found from equation 9 (9) and the peak inductor current can be determined with equation 10 (10) for this design, the rms inductor current is 3.51 a and the peak inductor current is 4.15 a. the chosen inductor is a coilcraft mss1038-252nx_ 2.5 m h. it has a saturation current rating of 7.62 a and an rms current rating of 6.55 a, meeting these requirements. smaller or larger inductor values can be used depending on the amount of ripple current the designer wishes to allow so long as the other design requirements are met. larger value inductors will have lower ac current and result in lower output voltage ripple, while smaller inductor values will increase ac current and output voltage ripple. in general, inductor values for use with the tps54332 are in the range of 1 m h to 47 m h. capacitor selection the important design factors for the output capacitor are dc voltage rating, ripple current rating, and equivalent series resistance (esr). the dc voltage and ripple current ratings cannot be exceeded. the esr is important because along with the inductor current it determines the amount of output ripple voltage. the actual value of the output capacitor is not critical, but some practical limits do exist. consider the relationship between the desired closed loop crossover frequency of the design and lc corner frequency of the output filter. in general, it is desirable to keep the closed loop crossover frequency at less than 1/5 of the switching frequency. with high switching frequencies such as the 1 mhz frequency of this design, internal circuit limitations of the tps54332 limit the practical maximum crossover frequency to about 75 khz. in general, the closed loop crossover frequency should be higher than the corner frequency determined by the load impedance and the output capacitor. this limits the minimum capacitor value for the output filter to: (11) where r o is the output load impedance (v o /i o ) and f co is the desired crossover frequency. for a desired maximum crossover of 75 khz the minimum value for the output capacitor is around 3.2 m f. this may not satisfy the output ripple voltage requirement. the output ripple voltage consists of two components; the voltage change due to the charge and discharge of the output filter capacitance and the voltage change due to the ripple current times the esr of the output filter capacitor. the output ripple voltage can be estimated by: (12) where c o is the total effective output capacitance. the maximum esr of the output capacitor can be determined from the amount of allowable output ripple as specified in the initial design parameters. the contribution to the output ripple voltage due to esr is the inductor ripple current times the esr of the output filter, so the maximum specified esr as listed in the capacitor data sheet is given by equation 13 12 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 ? ? + - = esr o sw lpp o pp r c f d i v 4 )5.0 ( ) 2 /( 1 max _ min _ co o o f r c = p ( ) - out in(max) out l(pk) out(max) in(max) out sw v v v i = i + 1.6 v l f ( ) ? ? - ? ? ? 2 out in(max) out 2 l(rms) out(max) in(max) out sw v v v 1 i = i + 12 v l f 0.8
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 (13) where v oppmax is the desired maximum peak-to-peak output ripple. the maximum rms ripple current in the output capacitor is given by equation 14 . (14) the minimum switching frequency should be used in the above equations (derated by a factor of 0.8). for this design example, two 47- m f ceramic output capacitors are chosen for c2 and c3. these are rated at 10 v with a maximum esr of 3 m ? and a ripple current rating in excess of 3 a. the calculated total rms ripple current is 300 ma ( 150 ma each) and the total esr required is 20 m ? or less. these output capacitors exceed the requirements by a wide margin and will result in a reliable, high-performance design. it is important to note that the actual capacitance in circuit may be less than the catalog value when the output is operating at the desired output of 2.5 v. 10 v rated capacitors are used to minimize the this reduction in capacitance due to dc voltage on the output. the selected output capacitor must be rated for a voltage greater than the desired output voltage plus ? the ripple voltage. any derating amount must also be included. other capacitor types work well with the tps54332, depending on the needs of the application. compensation components the external compensation used with the tps54332 allows for a wide range of output filter configurations. a large range of capacitor values and types of dielectric are supported. the design example uses ceramic x5r dielectric output capacitors, but other types are supported. a type ii compensation scheme is recommended for the tps54332. the compensation components are chosen to set the desired closed loop cross over frequency and phase margin for output filter components. the type ii compensation has the following characteristics; a dc gain component, a low frequency pole, and a mid frequency zero / pole pair. the dc gain is determined by equation 15 : (15) where: v ggm = 800 v ref = 0.8 v the low-frequency pole is determined by equation 16 : (16) r oa = 8.696 m ? . the mid-frequency zero is determined by equation 17 : (17) and, the mid-frequency pole is given by equation 18 : (18) the first step is to choose the closed loop crossover frequency. the closed-loop crossover frequency should be less than 1/8 of the minimum operating frequency, but for the tps54332 it is recommended that the maximum closed loop crossover frequency be not greater than 75 khz. next, the required gain and phase boost of the crossover network needs to be calculated. by definition, the gain of the compensation network must be the inverse of the gain of the modulator and output filter. for this design example, where the esr zero is much higher than the closed loop crossover frequency, the gain of the modulator and output filter can be approximated by equation 19 : copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 13 product folder link(s): tps54332 ggm ref dc o v v g = v ( ) p1 z p f = 1/ 2 r c p ( ) p po oo z f = 1/ 2 r c ( ) 12 out in(max) out cout(rms) in(max) out sw c v v v 1 i = v l f n ? ? - ? ? ? ( ) z1 z z f = 1/ 2 r c p ( ) oppmax max lpp sw o d 0.5 v esr = i 4 f c - -
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com (19) where: r sense = 1 ? /12 f co = closed-loop crossover frequency c o = output capacitance the phase loss is given by equation 20 : (20) where: r esr = equivalent series resistance of the output capacitor r o = v o /i o the measured overall loop response for the circuit is given in figure 20. note that the actual closed loop crossover frequency is higher than intended at about 25 khz. this is primarily due to variation in the actual values of the output filter components and tolerance variation of the internal feed-forward gain circuitry. overall the design has greater than 60 degrees of phase margin and will be completely stable over all combinations of line and load variability. now that the phase loss is known the required amount of phase boost to meet the phase margin requirement can be determined. the required phase boost is given by equation 21 : (21) where pm = the desired phase margin. a zero / pole pair of the compensation network will be placed symmetrically around the intended closed loop frequency to provide maximum phase boost at the crossover point. the amount of separation can be determined by equation 22 and the resultant zero and pole frequencies are given by equation 23 and equation 24 (22) (23) (24) the low-frequency pole is set so that the gain at the crossover frequency is equal to the inverse of the gain of the modulator and output filter. due to the relationships established by the pole and zero relationships, the value of r z can be derived directly by equation 25 : (25) where: v o = output voltage c o = output capacitance f co = desired crossover frequency r oa = 8.696 m ? gm comp = 12 a/v v ggm = 800 v ref = 0.8 v with r z known, c z and c p can be calculated using equation 26 and equation 27 : 14 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 ( ) ( ) 10 a a p p - - co esr o co o o pl = tan 2 f r c tan 2 f r c db k f f co p = 1 ? ? ? ? + = deg 45 2 tan pb k ( ) 90 deg pb = pm pl - - co o o oa z icomp ggm ref 2 f v c r r = gm v v p ( ) sense co o gain = 20 log 2 r f c p - k f f co z = 1
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 (26) (27) for this design, the two 47 m f output capacitors are used. for ceramic capacitors, the actual output capacitance is less than the rated value when the capacitors have a dc bias voltage applied. this is the case in a dc/dc converter. the actual output capacitance may be as low as 54 m f. the combined esr is approximately .001 ? . using equation 19 and equation 20 , the output stage gain and phase loss are equivalent as: gain = ? 6.94 db and pl - ? 93.94 degrees for 70 degrees of phase margin, equation 21 requires 63.64 degrees of phase boost. equation 22 , equation 23 , and equation 24 are used to find the zero and pole frequencies of: f z1 = 11.57 khz and f p1 = 216 khz r z , c z , and c p are calculated using equation 25 , equation 26 , and equation 27 : (28) (29) (30) using standard values for r3, c6, and c7 in the application schematic of figure 12 : r3 = 75 k ? c6 = 180 pf c7 = 10 pf bootstrap capacitor every tps54332 design requires a bootstrap capacitor, c4. the bootstrap capacitor must be 0.1 m f. the bootstrap capacitor is located between the ph pins and boot pin. the bootstrap capacitor should be a high-quality ceramic type with x7r or x5r grade dielectric for temperature stability. catch diode the tps54332 is designed to operate using an external catch diode between ph and gnd. the selected diode must meet the absolute maximum ratings for the application: reverse voltage must be higher than the maximum voltage at the ph pin, which is vinmax + 0.5 v. peak current must be greater than ioutmax plus on half the peak to peak inductor current. forward voltage drop should be small for higher efficiencies. it is important to note that the catch diode conduction time is typically longer than the high-side fet on time, so attention paid to diode parameters can make a marked improvement in overall efficiency. additionally, check that the device chosen is capable of dissipating the power losses. for this design, a diodes, inc. b340a is chosen, with a reverse voltage of 40 v, forward current of 3 a, and a forward voltage drop of 0.5 v. copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 15 product folder link(s): tps54332 z z z r f c = 1 2 1 p 1 cp p = = 9.8 pf 2 216000 75000 1 cz p = = 183 pf 2 11570 75000 z p p r f c = 1 2 1 p p w -6 6 2 50000 2.5 82 10 8.696 10 rz = = 72.92 k 12 800 0.8
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com output voltage limitations due to the internal design of the tps54332, there are both upper and lower output voltage limits for any given input voltage. the upper limit of the output voltage set point is constrained by the maximum duty cycle of 91% and is given by equation 31 : (31) where: v in min = minimum input voltage i o max = maximum load current v d = catch diode forward voltage r l = output inductor series resistance the equation assumes maximum on resistance for the internal high-side fet. the lower limit is constrained by the minimum controllable on time which may be as high as 130 ns. the approximate minimum output voltage for a given input voltage and minimum load current is given by equation 32 : (32) where: v in max = maximum input voltage i o min = minimum load current v d = catch diode forward voltage r l = output inductor series resistance this equation assumes nominal on-resistance for the high-side fet and accounts for worst case variation of operating frequency set point. any design operating near the operational limits of the device should be carefully checked to assure proper functionality. power dissipation estimate the following formulas show how to estimate the device power dissipation under continuous conduction mode operations. they should not be used if the device is working in the discontinuous conduction mode (dcm) or pulse skipping eco-mode tm . the device power dissipation includes: 1) conduction loss: pcon = iout 2 x r ds(on) x v out /vin 2) switching loss: psw = 0.55 x 10 -9 x vin 2 x i out x fsw 3) gate charge loss: pgc = 22.8 x 10 -9 x fsw 4) quiescent current loss: pq = 0.082 x 10 -3 x vin where: i out is the output current (a). r ds(on) is the on-resistance of the high-side mosfet ( ? ). v out is the output voltage (v). vin is the input voltage (v). fsw is the switching frequency (hz). so ptot = pcon + psw + pgc + pq for given t a , t j = t a + rth x ptot. for given t jmax = 150 c, t amax = t jmax ? rth x ptot. 16 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 ( ) ( ) ( ) omax in min o max ds(on) max d o max l d v = 0.91 v i r + v i r v - - - ( ) ( ) ( ) omin in max omin d o min l d v = 0.118 v i rin + v i r v - - -
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 where: ptot is the total device power dissipation (w). t a is the ambient temperature ( c). t j is the junction temperature ( c) . rth is the thermal resistance of the package ( c/w). t jmax is maximum junction temperature ( c). t amax is maximum ambient temperature ( c). pcb layout the vin pin should be bypassed to ground with a low esr ceramic bypass capacitor. care should be taken to minimize the loop area formed by the bypass capacitor connections, the vin pin, and the anode of the catch diode. the typical recommended bypass capacitance is 10- m f ceramic with a x5r or x7r dielectric and the optimum placement is closest to the vin pins and the source of the anode of the catch diode. see figure 13 for a pcb layout example. the gnd d pin should be tied to the pcb ground plane at the pin of the ic. the source of the low-side mosfet should be connected directly to the top side pcb ground area used to tie together the ground sides of the input and output capacitors as well as the anode of the catch diode. the ph pin should be routed to the cathode of the catch diode and to the output inductor. since the ph connection is the switching node, the catch diode and output inductor should be located very close to the ph pins, and the area of the pcb conductor minimized to prevent excessive capacitive coupling. for operation at full rated load, the top side ground area must provide adequate heat dissipating area. the tps54332 uses a fused lead frame so that the gnd pin acts as a conductive path for heat dissipation from the die. many applications have larger areas of internal or back side ground plane available, and the top side ground area can be connected to these areas using multiple vias under or adjacent to the device to help dissipate heat. the additional external components can be placed approximately as shown. it may be possible to obtain acceptable performance with alternate layout schemes, however this layout has been shown to produce good results and is intended as a guideline. figure 13. tps54332 board layout copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 17 product folder link(s): tps54332 boot vsense ph vin gnd en vout ph vin topside ground area output inductor output filter capacitor boot capacitor input bypass capacitor catch diode signal via route boot capacitor trace on other layer to provide wide path for top side ground resistor divider feedback trace comp ss compensation network thermal via slow start capacitor uvlo resistor divider exposed powerpad area
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com estimated circuit area the estimated printed circuit board area for the components used in the design of figure 12 is 0.58 in 2 . this area does not include test points or connectors. electromagnetic interference (emi) considerations as emi becomes a rising concern in more and more applications, the internal design of the tps54332 takes measures to reduce the emi. the high-side mosfet gate drive is designed to reduce the ph pin voltage ringing. the internal ic rails are isolated to decrease the noise sensitivity. a package bond wire scheme is used to lower the parasitics effects. to achieve the best emi performance, external component selection and board layout are equally important. follow the step by step design procedure above to prevent potential emi issues. application curves figure 14. tps54332 efficiency figure 15. tps54332 low current efficiency figure 16. tps54332 load regulation figure 17. tps54332 line regulation 18 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 60 65 70 75 80 85 90 95 100 0 0.5 1 1.5 2 2.5 3 3.5 i - output current - a o efficiency - % v = 2.5 v o v = 5 v i v = 12 v i v = 15 v i -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 0.5 1 1.5 2 2.5 3 3.5 i - output current - a o v = 5 v i v = 12 v i v = 15 v i output voltage regulation - % v = 2.5 v o 50 55 60 65 70 75 80 85 90 95 100 0 0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2 0.225 0.25 i - output current - a o v = 5 v i efficiency - % v = 12 v i v = 15 v i -0.025 -0.02 -0.015 -0.01 -0.005 0 0.005 0.01 0.015 0.02 0.025 5 6 7 8 9 10 11 12 13 14 15 i = 1 a o v - input voltage - v i output regulation - %
tps54332 www.ti.com slvs875a ? january 2009 ? revised march 2010 figure 18. tps54332 transient response figure 19. tps54332 loop response figure 20. tps54332 output ripple figure 21. tps54332 input ripple copyright ? 2009 ? 2010, texas instruments incorporated submit documentation feedback 19 product folder link(s): tps54332 t - time - 1 s/div m ph v out 20 mv/div 5 v/div t - time - 500 s/div m .75 to 2.5 a step 10mv/div v out i out t - time - 1 s/div m ph v in 5 v/div 100 mv/div -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 f - frequency - hz -180 -150 -120 -90 -60 -30 0 30 60 90 120 150 180 gain phase 10 100 1k 10k 100k 1m gain - db phase - deg
tps54332 slvs875a ? january 2009 ? revised march 2010 www.ti.com figure 22. tps54332 start up figure 23. tps54332 output ripple during eco-mode ? operation revision history changes from original (january 2009) to revision a page ? added a new table to the description - for additional design needs ................................................................................... 2 ? changed the absolute maximum ratings table, input voltage - en pin max value from: 5v to 6v ........................ 2 20 submit documentation feedback copyright ? 2009 ? 2010, texas instruments incorporated product folder link(s): tps54332 t - time - 2 ms/div ph v out 20 mv/div 5 v/div t - time - 2 ms/div v out v in 1 v/div 5 v/div
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TPS54332DDAR so power pad dda 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 package materials information www.ti.com 18-nov-2009 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TPS54332DDAR so powerpad dda 8 2500 346.0 346.0 29.0 package materials information www.ti.com 18-nov-2009 pack materials-page 2

important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti ? s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti ? s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. ti products are not authorized for use in safety-critical applications (such as life support) where a failure of the ti product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of ti products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by ti. further, buyers must fully indemnify ti and its representatives against any damages arising out of the use of ti products in such safety-critical applications. ti products are neither designed nor intended for use in military/aerospace applications or environments unless the ti products are specifically designated by ti as military-grade or " enhanced plastic. " only products designated by ti as military-grade meet military specifications. buyers acknowledge and agree that any such use of ti products which ti has not designated as military-grade is solely at the buyer ' s risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications audio www.ti.com/audio communications and telecom www.ti.com/communications amplifiers amplifier.ti.com computers and peripherals www.ti.com/computers data converters dataconverter.ti.com consumer electronics www.ti.com/consumer-apps dlp ? products www.dlp.com energy and lighting www.ti.com/energy dsp dsp.ti.com industrial www.ti.com/industrial clocks and timers www.ti.com/clocks medical www.ti.com/medical interface interface.ti.com security www.ti.com/security logic logic.ti.com space, avionics and defense www.ti.com/space-avionics-defense power mgmt power.ti.com transportation and www.ti.com/automotive automotive microcontrollers microcontroller.ti.com video and imaging www.ti.com/video rfid www.ti-rfid.com wireless www.ti.com/wireless-apps rf/if and zigbee ? solutions www.ti.com/lprf ti e2e community home page e2e.ti.com mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2011, texas instruments incorporated

▲Up To Search▲

Price & Availability of TPS54332DDAR

	To Download TPS54332DDAR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .